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Volume 27 Issue 3
May  2014
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Journal of Southwest Jiaotong University  > 2014  >  27(3): 450-454.
LUO Jianjun. Tunnel Entrance Field Characteristics Induced by High Speed Train with Crosswind at Entrance[J]. Journal of Southwest Jiaotong University, 2017, 30(4): 746-754. doi: 10.3969/j.issn.0258-2724.2017.04.013
Citation: DING Na, SHU Zeliang. DC Bus Capacitor Voltage Balancing Circuits in Diode-Clamped Multilevel Converter[J]. Journal of Southwest Jiaotong University, 2014, 27(3): 450-454. doi: 10.3969/j.issn.0258-2724.2014.03.013
shu

DC Bus Capacitor Voltage Balancing Circuits in Diode-Clamped Multilevel Converter

doi: 10.3969/j.issn.0258-2724.2014.03.013
  • Received Date: 12 Nov 2012
  • Publish Date: 25 Jun 2014
    Abstract
  • In order to solve the imbalance of DC bus capacitor voltages in the diode-clamped multilevel converter, a balancing circuit with two-layer auxiliary inductors was designed. With this circuit, the voltages of all the DC-side capacitors in the multilevel converter can be balanced by a simple control. On the basis of analysis of the circuit structure and control principle, the ranges of inductor parameters were analyzed from the viewpoint of energy conversion. Taking a five-level converter as an example, a Matlab/Simulink simulation model and an experimental prototype were built, and the balance characteristics of DC bus capacitor voltages were compared between the proposed two-layer auxiliary circuit and the traditional one-layer circuit. Experimental results verify that the proposed two-layer circuit could effectively balance all the DC bus capacitor voltages within 20 ms, and the capacitor voltage ripple was less than 3%.

     

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    • References(16)
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