大数快速模幂算法的硬件设计
Hardware Design of Fast Module Exponential Algorithm
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摘要: 将快速模幂算法、快速模乘算法和快速加法组合,提出了一种大数快速RSA算法,并利用该算法给出了 一个RSA公开密钥的加解密硬件实现方案.首先采用m-ary方法,减少模乘运算次数;其次采用Montgomery改 进算法,减少模加运算次数;最后,采用高速加法器并调整加法与乘法的结构使其同时运行,以节约资源.对于 1 024位操作数,在100 MHz时钟频率下,加密速率约为390 kbit/s.Abstract: Fast module exponential algorithm, fast module multiplication algorithm and fast module addition algorithm were integrated to form a hybrid fast RSA algorithm for large number operations. A hardware scheme for implementation of RSA key was proposed using the proposed algorithm. In the algorithm,m-ary method is used in the first stage to reduce multiplication times, then modified Montgomery method is used to decrease addition times, and finally fast adders and multiplication unit are made to work synchronously by adjusting their structures. A processing speed of 390 kbit/ s at 100 MHz clock was achieved for a 1 024 bit key operand.
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Key words:
- algorithms /
- module exponential /
- module multiplication /
- RSA /
- Montgomery method /
- SCA
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